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The ExpressLane™ PEX8796 is a 96-lane, 24-port, PCIe Gen3 switch device developed on 40nm technology. PEX8796 offers Multi-Host PCI Express switching capability that enables users to connect multiple hosts to their respective endpoints via scalable, high-bandwidth, non-blocking interconnection to a wide variety of applications including servers, storage, communications, and graphics platforms. In addition to high number lane/port count, the device offers two NT ports and clock isolation capability.

Due to their backwards compatibility, designing with PCIe Gen3 switches in mixed (Gen1, Gen2 and Gen3) systems allows designers to future-proof their designs for full Gen3 enablement when migrating to next-generation end-points. The PEX8796 is well suited for fan-out, aggregation, and peer-to-peer traffic patterns. Included is PLX's proprietary visionPAK debug software, which allows, for example, internal receive-eye observation after equalization and access to the devices' internal debug registers thus enabling faster time to market.

Technical Documentation

Document/Resources Description Version Date Access
Product Brief Product Overview 1.3 04Oct13 Download
Data Book Detailed Technical Specifications 1.0 05June13 Requires CDA
Design Notes Schematic Design Checklist 3.0 10June13 Requires CDA
Surprise Down Handling with PLX PCIe Switches 1.0 08April14 Requires CDA
Errata Silicon Revisions and Errata List 1.12 25Aug14 Requires CDA
Application Notes Error Injection (white paper) 1.4 20May14 Requires CDA
PCIe Gen3 Equalizer Tuning Guide (for revisions AA, AB) 1.1 01Oct13 Requires CDA
Proof of concept high-performance PCIe Gen3 over optical cable with no special software or hardware 1.0 15Nov11 Requires Membership
Using a PCIe Switch as a Bandwidth Bridge 1.0 04/10 Requires Membership
White Paper: Independent SSC Operation without SSC Clock Isolation (also see video) 1.0 11May12 Requires Membership
Design Guidelines Quick Start Hardware Design Guide 1.0 11Mar13 Requires CDA
Videos Independent SSC using PCI Express. Join us at to make this feature a validated PLX standard offering 1.0 03May12 View HTML
IO Sharing via PLX PCIe Switches -- Oct 2010 Requires Membership
PCI Express 3.0 over Optical Cable -- Oct 2010 Requires Membership
PCI Express Clustering for next generation data centers -- Oct 2010 Requires Membership
PCI Express Gen3, The Ultimate Choice - Inside and Outside the Box -- 27Sep11 View HTML
Quality & Reliability Certificate of Compliance (CoC) - REACH138/RoHS2/Halogen-Free -- 15Mar13 Requires Membership
Certificate of Compliance (CoC) - REACH144/RoHS2/Halogen-Free -- 28Aug13 Requires Membership
Certificate of Compliance- REACH and RoHS -- 11Sep12 Requires Membership
Certificate of Compliance, REACH 151, RoHS2 and Halogen-Free -- 04Mar14 Requires Membership
Certificate of Compliance, REACH 155, RoHS2 and Halogen-Free -- 04Sept14 Requires Membership
FIT Rate Reliability Monitor- Test Report (Quarterly) -- Q2 2014 Download
Full Product and Package Reliability
Qualification Report
3.1 18Jan14 Requires CDA
Package Material Composition and Mass Calculation -- 31July14 Requires Membership
Package Reliability Qualification Report 2.1 18June14 Requires Membership
Reflow Profile -- 19Jan12 Requires CDA
Technology White Paper Deallocation Performance Issue (white paper) 1.0 13Aug2014 Requires CDA
Webinars About PLX PCIe Gen3 Switches (may require Webex plug-in) -- 05Oct11 Requires Membership

Development Tools

Document/Resources Description Version Date Access
Rapid Development Kit (RDK) Hardware Reference Manual (HRM) 1.1 28June13 Requires CDA
Software Development Kit (SDK) Software Development Kit -- -- Requires Membership
BSDL Boundary Scan Description Language files -- 17Sept13 Requires CDA
HSPICE Model HSPICE Model -- 23Dec13 Requires CDA
OrCAD OrCAD Library (35x35) 1.0 23Aug12 Requires CDA
Pinout Document Pinout List (.xls) 1.0 27Jul12 Requires CDA
Design Guidelines PCB Layout Review Guide 1.1 29Sep12 Requires Membership

Relevant Press Releases

Release Date Announcement
11/12/12 PLX Unveils ExpressFabric at SC12 Supercomputing Event


Application Description Document
Failover System Using Multi-Root Up to 4 upstream ports provide failover and efficient CPU utilization ExpressApps #91(PDF)
Systems Using the Intel Jasper Forest CPU High Lane/Port Count Fan-Out ExpressApps #72(PDF)

Supporting Documentation