PEX 8625

PEX 8625  Lead Free  PCI-SIG Integrator's List

24 Lane, 24 Port PCI Express Switch, 35 x 35mm FCBGA

The ExpressLane™ PEX 8625 offers 24 PCI Express Gen 2 (5.0 GT/s) lanes, capable of configuring up to 24 flexible ports and fully conforms to the PCI Express Base Specification, rev 2.0. With 24-ports, the PEX 8625 is the largest PCIe switch in the industry serving the communications and networking markets. The PEX 8625 architecture implements Multicast as defined in the PCI Express Specification. With support for 64 multicast groups and 24 ports, the PEX 8625 provides the user with flexibility in the programmability of multicast, a required feature in the primary markets served by the PEX 8625. Any available port in the PEX 8625 can be the source of a multicast transaction based. PEX 8625 also supports cut-thru with the industry's lowest latency of 200ns (x1 to x1) and offers state of the art test and debug features which provide visibility into the various internal blocks including the SerDes. The device also features an on-chip Non-Transparent port for dual-host and failover applications as well as Virtual Switch Mode function for endpoint migration. The PEX 8625 is offered in a 35 x 35mm 1156-ball FCBGA and is available in lead-free packaging. This device supports Access Control Services (ACS).

Page Index

Related Gen 1 Devices


Related Gen 2 Devices

PEX 8625 Technical Documentation

Document/Resources Everyone Access Requires Membership Requires NDA Description Version Date
Product Brief Download     Product Overview 1.0 10/09
Data Book     Download Detailed Technical Specifications 1.3 03/10
Design Notes     Download Power Management Modes, PEX 8600 Products (white paper) 1.0 04/08
    Download Read Pacing, 8600 family feature (white paper) 1.0 10/07
    Download Dynamic Buffer Pool, 8600 family feature (white paper) 1.0 10/07
    Download Error Recovery and Fencing Mechanisms (white paper) 1.0 01/08
    Download Non-Transparent Mode: Setup & Demonstration (white paper) 1.0 04/09
    Download Quick Start Hardware Design Guide 1.0 12/09
Errata     Download Silicon Revisions and Errata List 1.0 12/09
Application Notes     Download Gen 2 switch compatibility with Gen 1 devices 1.2 11/09
Part Numbers Listing View HTML     Part Number, Listing and Compliance -- --
Quality & Reliability   Download   RoHS 6/6 Certificate of Compliance (PEX8000 ending with the suffix F or G) -- --
  Download   Moisture/Reflow Sensitivity Classification (IPC/JEDEC J-STD-020D.1) -- 03/08
    Download RoHS Certificate of Compliance (FCBGA) -- --
    Download Reliability Qualification Report 2.2 11/09
    Download RoHS Certificate of Compliance (PBGA) -- 01/10
    Download RoHS 6/6 Certificate of Compliance (PEX86xx Flip Chip BGA products with a suffix \'F\') -- --

PEX 8625 Development Tools

Document/Resources Everyone Access Requires Membership Requires NDA Description Version Date
Interoperability     Download Interoperability Report 1.0 01/10
Signal Integrity Kit     Download PLX Gen 2 Testing over "16 / 30" Tyco Comm Backplane (presentation) 1.0 12/08
    Download PCIe Receiver Equalization (white paper) 1.0 12/08
    Download Using PEX 8648 SMA based (SI) Card (white paper) 1.0 12/08
    Download PLX PCI Express over 30" of Legacy Backplane (white paper) 1.0 07/08
    Download Tool provides loss estimation and bandwidth distortion for a specified trace distance and configuration. 2.0 06/08
Rapid Development Kit (RDK)     Download Hardware Reference Manual 1.1 02/10
Software Development Kit (SDK)   View HTML   Software Development Kit -- --
BSDL     Download Boundary Scan Description Language files 1.0 10/09
HSPICE Model     Download HSPICE Model -- 10/09
OrCAD     Download Pinout List 1.0 11/09
    Download OrCAD symbol library files -- 12/09