PEX 8617

PEX 8617  Lead Free  PCI-SIG Integrator's List

16-Lane, 4-Port PCI Express Gen 2 (5.0 GT/s) Switch, 19 x 19mm PBGA

The ExpressLane™ PEX 8617 device offers 16 PCI Express Gen 2 (5.0 GT/s) lanes, capable of configuring up to 4 flexible ports. The switch conforms to the PCI Express Base Specification, rev 2.0. The 16-lane switch enables users to add scalable, high bandwidth, non-blocking interconnection to a wide variety of applications including workstations, communications, storage, and embedded systems as well as intelligent I/O modules and add-in cards. The PEX 8617 boasts the industry's lowest 16-lane PCIe Gen 2 latency at 140ns and unsurpassed performance with its non-blocking architecture, capable of supporting both host-centric as well as true peer-to-peer traffic. The PEX 8617 also features an on-chip Non-Transparent port for dual-host and failover applications, as well as two SSC isolation and two Virtual Channels for enhanced QoS. The device is hardware configurable and software programmable, allowing users to tailor their port configurations and QoS operating characteristics to suit their application requirements. The PEX 8617 is offered in a 19 x 19mm 324-ball PBGA. This device is available in lead-free packaging. This device supports Access Control Services (ACS).

Page Index

Related Gen 1 Devices


Related Gen 2 Devices

PEX 8617 Technical Documentation

Document/Resources Everyone Access Requires Membership Requires NDA Description Version Date
Product Brief Download     Product Overview 1.1 05/09
Data Book     Download Detailed Technical Specifications 1.0 07/09
Design Notes     Download Power Management Modes, PEX 8600 Products (white paper) 1.0 04/08
    Download Dual Cast, 8600 family feature (white paper) 1.0 10/07
    Download Read Pacing, 8600 family feature (white paper) 1.0 10/07
    Download Dynamic Buffer Pool, 8600 family feature (white paper) 1.0 10/07
    Download Error Recovery and Fencing Mechanisms (white paper) 1.0 01/08
    Download Non-Transparent Mode: Setup & Demonstration (white paper) 1.0 04/09
    Download Quick Start Hardware Design Guide 1.1 12/09
    Download Hardware Design Checklist 1.0 11/09
Errata     Download Silicon Errata List 1.4 03/10
Interoperability     Download Interoperability Report 2.0 06/09
Application Notes     Download Using Dual Cast feature of Gen 2 switches 1.0 05/08
    Download Gen 2 switch compatibility with Gen 1 devices 1.2 11/09
    Download Performance Metrics 1.0 12/09
Part Numbers Listing View HTML     Part Number, Listing and Compliance -- --
Quality & Reliability   Download   RoHS 6/6 Certificate of Compliance (PEX8000 ending with the suffix F or G) -- --
  Download   Moisture/Reflow Sensitivity Classification (IPC/JEDEC J-STD-020D.1) -- 03/08
    Download RoHS Certificate of Compliance (FCBGA) -- --
    Download Reliability Qualification Report -- 06/09
    Download Lead-Free Material Analysis Data (19x19mm) -- 04/09
    Download RoHS Certificate of Compliance (PBGA) -- 01/10
    Download RoHS 6/6 Certificate of Compliance (PEX86xx Flip Chip BGA products with a suffix \'F\') -- --

PEX 8617 Development Tools

Document/Resources Everyone Access Requires Membership Requires NDA Description Version Date
Signal Integrity Kit     Download PLX Gen 2 Testing over "16 / 30" Tyco Comm Backplane (presentation) 1.0 12/08
    Download PCIe Receiver Equalization (white paper) 1.0 12/08
    Download Using PEX 8648 SMA based (SI) Card (white paper) 1.0 12/08
    Download PLX PCI Express over 30" of Legacy Backplane (white paper) 1.0 07/08
    Download Tool provides loss estimation and bandwidth distortion for a specified trace distance and configuration. 2.0 06/08
Rapid Development Kit (RDK)     Download Hardware Reference Manual 1.1 11/09
    Download RDK Schematics -- --
Software Development Kit (SDK)   View HTML   Software Development Kit -- --
BSDL     Download Boundary Scan Description Language files -- 03/09
HSPICE Model     Download HSPICE Model -- 04/09
OrCAD     Download OrCAD Library Files -- --
    Download Pinout List 1.0 11/09