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PEX 8609

8 Lane, 8 Port PCI Express Switch, 15 x 15mm PBGA
The ExpressLane™ PEX 8609 offers 8 PCI Express Gen 2 (5.0 GT/s) lanes, capable of configuring up to 8 flexible ports and fully conforms to the PCI Express Base Specification, rev 2.0. PEX 8609 architecture supports a high-performance DMA engine with four DMA channels and internal buffer space for internal descriptor support. Up to 256 descriptors are supported internally or alternatively descriptors can also exist in host memory. Each descriptor provides support for large transfer sizes (up to 128MB) giving the user the capability to perform very large data transfers in any direction (memory to device, device to device, memory to memory). PEX 8609 also supports cut-thru with the industry's lowest latency of 140ns (x4 to x1) and offers two virtual channels for traffic prioritization in the system. The device also features an on-chip Non-Transparent port for dual-host and failover applications and supports dual-clock domain operation by virtue of support for Spread Spectrum Clock (SSC) isolation, is offered in a 15 x 15mm 324-ball PBGA and is available in both leaded and lead-free packaging.
Supporting Documentation
- PCIe Technical Info & White Papers
- General PLX Product Documentation
- Support Documentation (Quality, FAQs, RoHS...)
Hot Applications
PEX 8609 Technical Documentation
| Document/Resources | Everyone Access | Requires Membership | Requires NDA | Description | Version | Date |
|---|---|---|---|---|---|---|
| Product Brief | Download | Product Overview | 1.0 | 08/08 | ||
| Part Numbers Listing | View HTML | Part Number, Listing and Compliance | -- | 09/06 | ||
| Data Book | Download | Detailed Technical Specifications | 0.80 | 08/08 | ||
| Design Notes | Download | PEX8609 Hardware Design Checklist | 0.95 | 08/08 | ||
| Download | Power Management Modes, PEX 8600 Products (White Paper) | 1.0 | 04/08 | |||
| Download | Dual Cast, 8600 family feature (white paper) | 1.0 | 10/07 | |||
| Download | Read Pacing, 8600 family feature (white paper) | 1.0 | 10/07 | |||
| Download | Dynamic Buffer Pool, 8600 family feature (white paper) | 1.0 | 10/07 | |||
| Download | Error Recovery and Fencing Mechanisms (white paper) | 1.0 | 01/08 | |||
| Application Notes | Download | Using Dual Cast feature of Gen 2 switches | 1.0 | 05/08 | ||
| Download | Gen 2 switch compatibility with Gen 1 devices | 1.0 | 05/08 |
