PEX 8604

PEX 8604  Lead Free  PCI-SIG Integrator's List

4 Lane, 4 Port PCI Express Gen 2 (5.0 GT/s) Switch, 15 x 15mm PBGA

The ExpressLane™ PEX 8604 device offers 4 PCI Express Gen 2 (5.0 GT/s) lanes, which supports up to four ports. The switch conforms to the PCI Express Base Specification, rev 2.0. The PEX8604 is the industry's smallest 4-lane Gen 2 device and it enables users with the ability to connect multiple PCI Express endpoints which are used in a variety of consumer and embedded applications including Multi-Function Printers, wireless ethernet modules, IO expansion modules, Express Card applications as well as other low power applications. The PEX 8604 boasts unsurpassed performance with its non-blocking architecture, capable of supporting both host-centric as well as true peer-to-peer traffic on its ports. The PEX 8604 supports x2 port width natively on the upstream port which allows it to interface directly and seamlessly to embedded processors commonly used in such applications. The PEX 8604 also features an on-chip Non-Transparent port for dual-host and failover applications, supports dual-clock domain operation by virtue of support for Spread Spectrum Clock (SSC) isolation as well as two Virtual Channels for enhanced QoS. The device is hardware configurable and/or software programmable, allowing users to tailor their port configurations and QoS operating characteristics to suit their application requirements. The PEX 8604 is offered in a 15 x 15mm 196-ball PBGA. This device is available in both leaded and lead-free packaging. This device supports Access Control Services (ACS).

Page Index

Related Gen 3 Devices


Related Gen 2 Devices


Related Gen 1 Devices

PEX 8604 Technical Documentation

Document/Resources Everyone Access Requires Membership Requires NDA Description Version Date
Product Brief Download     Product Overview 1.3 04/10
Data Book     Download Detailed Technical Specifications 1.3 31Mar11
Design Notes     Download Dual Cast, 8600 family feature (white paper) 1.0 10/07
    Download Dynamic Buffer Pool, 8600 family feature (white paper) 1.0 10/07
    Download Error Injection (white paper) 1.0 07/10
    Download Hardware Design Checklist 1.0 11/09
    Download Non-Transparent Mode: Setup & Demonstration (white paper) 1.0 04/09
    Download Power Management Modes, PEX 8600 Products (white paper) 1.0 04/08
    Download Quick Start Hardware Design Guide 1.3 22Sep10
    Download Read Pacing, 8600 family feature (white paper) 1.0 10/07
    Download REXT Resistor Guidelines 1.1 05Aug11
Errata     Download Silicon Errata List 1.6 09July11
Interoperability     Download Interoperability Report 2.0 06/09
Application Notes     Download Gen 2 switch compatibility with Gen 1 devices 1.2 11/09
    Download Performance Monitor Feature (white paper) 1.0 05Jan11
    Download Timing Specifications for EEPROM, I2C, and JTAG 1.1 24Aug10
    Download Using a PCIe Switch as a Bandwidth Bridge 1.0 04/10
    Download Using Dual Cast feature of Gen 2 switches 1.0 05/08
Videos   View HTML   IO Sharing via PLX PCIe Switches -- Oct 2010
  View HTML   PCI Express 3.0 over Optical Cable -- Oct 2010
  View HTML   PCI Express Clustering for next generation data centers -- Oct 2010
Product Change Notification (PCN)   Download   PCN-2010-14: Final Test Location (ASE Kaohsiung Taiwan) 1.0 26Oct10
Ordering Information View HTML     Part Number, Listing and Compliance -- --
Quality & Reliability   Download   Certificate of Compliance (CoC) -- REACH -- 28Jan11
  Download   Green 15x15 PBGA Materials Analysis Data Report -- 04/09
  Download   ICP Test Report -- 27Sep10
    Download ICP Test Reports -- --
  Download   Material Analysis Data, Green (35x35mm) -- 15Feb11
  Download   Moisture/Reflow Sensitivity Classification (IPC/JEDEC J-STD-020D.1) -- 03/08
    Download Reliability Qualification Report -- 06/09
    Download RoHS 6/6 Certificate of Compliance (PEX86xx Flip Chip BGA products with a suffix 'F') -- --
Webinars   View HTML   About PLX PCIe Gen3 Switches (may require Webex plug-in) -- 05Oct11

PEX 8604 Development Tools

Document/Resources Everyone Access Requires Membership Requires NDA Description Version Date
Signal Integrity Kit     Download PCIe Receiver Equalization (white paper) 1.0 12/08
    Download PLX Gen 2 Testing over "16 / 30" Tyco Comm Backplane (presentation) 1.0 12/08
    Download PLX PCI Express over 30" of Legacy Backplane (white paper) 1.0 07/08
    Download Tool provides loss estimation and bandwidth distortion for a specified trace distance and configuration. 2.0 06/08
    Download Using PEX 8648 SMA based (SI) Card (white paper) 1.3 20Jul10
Rapid Development Kit (RDK)     Download Hardware Reference Manual 1.3 06Aug10
Software Development Kit (SDK)   View HTML   Software Development Kit -- --
BSDL     Download Boundary Scan Description Language files -- 03/09
HSPICE Model     Download HSPICE Model -- 04/09
OrCAD     Download OrCAD Design Files for Add-in Card RDK -- 12/08
    Download OrCAD Library Files for the PEX 8604 -- 12/08
Pinout Document     Download Pinout List 1.1 01/10
Design Guidelines     Download PCB Layout Review Guide 1.0 11Oct11

Relevant Press Releases

Release Date Announcement
12/21/11 PLX Enables High-Performance PCI Express on ASRock's Flagship X79 Graphics Platform
09/27/11 Industry-Leading PCI Express Compliancy List Grows with Addition of New Switch, Bridge Products
08/01/11 PLX to Present on PCI Express-SSD Storage at Flash Memory Summit
06/21/11 PLX and Avago Technologies Team-Up to Prove PCI Express over Fiber Optics at 64Gbps
11/08/10 PLX Announces Sampling of Industry's First PCI Express 3.0 Switches
10/18/10 PLX Techology Executive to Present at Linley High-Speed Interconnect Conference

PEX 8604 Applications

Application Description Document
Bandwidth Bridge Gen 2 speeds; Low power; small package; Fan-Out ExpressApps #77
(PDF)
Basic fan-out in consumer applications Low power; small package, Fan-Out ExpressApps #76
(PDF)