ExpressLane™ PCI Express Switches
ExpressLane™ PCI Express Gen 2 Switches offer the highest performance, Dual Cast, Read Pacing, lowest latency, lowest power consumption, integrated non-transparency, integrated Hot-Plug support, small flip-chip packaging and highly flexible configurations up to x16.
- Highly Flexible Port Configurations
- Lowest Power and Lowest Latency
- Non-Transparent Port Capability
- True Peer-to-Peer Data Transfer
- Hot-Plug Support
- Gen 2 performancePAK™
- Dual Cast™
- Read Pacing™
- Dynamic Buffer Allocation
- DMA-engine
- Gen 2 visionPAK™
- Performance Monitoring
- Packet Generator
- Measure SerDes Eye Width
- Error Injection
What's New
News and Events
- PLX Press Room
- IDF, Taipei
October 20-21 - WinHEC, Los Angeles
November 4-7 - Freescale Tech Forum
November 4-5
PLX ExpressLane™ Gen 2 PCI Express compliant Switches
| Part Number | Lanes | Ports | Latency (ns) | Dual Cast | Read Pacing | DBA* | NT* | DMA* | HPC* | VCs* | SSC* | Power Typ. (W) | Package Size (mm2) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| PEX 8604 | 4 | 4 | 190 | Yes | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 0.8 | 15 x 15 |
| PEX 8606 | 6 | 6 | 190 | Yes | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.0 | 15 x 15 |
| PEX 8608 | 8 | 8 | 140 | Yes | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.2 | 15 x 15 |
| PEX 8609 | 8 | 8 | 140 | Yes | Yes | Yes | Yes | Yes | ^^ | 2 | Yes | 1.2 | 15 x 15 |
| PEX 8612 | 12 | 3 | 150 | Yes | Yes | Yes | Yes | -- | 2 | 1 | -- | 2.0 | 19 x 19 |
| PEX 8614 | 12 | 12 | 140 | Yes | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.5 | 19 x 19 |
| PEX 8615 | 12 | 12 | 140 | Yes | Yes | Yes | Yes | Yes | ^^ | 2 | Yes | 1.6 | 19 x 19 |
| PEX 8616 | 16 | 4 | 150 | Yes | Yes | Yes | Yes | -- | 2 | 1 | -- | 2.2 | 19 x 19 |
| PEX 8618 | 16 | 16 | 140 | Yes | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.9 | 19 x 19 |
| PEX 8619 | 16 | 16 | 140 | Yes | Yes | Yes | Yes | Yes | ^^ | 2 | Yes | 2.0 | 19 x 19 |
| PEX 8624 | 24 | 6 | 145 | Yes | Yes | Yes | Yes | -- | 3 | 1 | -- | 3.0 | 19 x 19 |
| PEX 8632 | 32 | 12 | 145 | Yes | Yes | Yes | Yes | -- | 3 | 1 | -- | 2.8 | 27 x 27 |
| PEX 8647 | 48 | 3 | 140 | Yes | Yes | Yes | Yes | -- | 3 | 1 | -- | 3.8 | 27 x 27 |
| PEX 8648 | 48 | 12 | 140 | Yes | Yes | Yes | Yes | -- | 3 | 1 | -- | 4.0 | 27 x 27 |
* DBA = Dynamic Buffer Allocation; NT = Non-Transparency; DMA = Direct Memory Access; HPC = Hot-Plug Controllers; ^^ = Hot-Plug control via I2C; VCs = Virtual Channels; SSC = Spread Spectrum Clock Isolation; Gen 2 devices are fully backwards compatible to r1.1/1.0a
General Documentation
(Product Listing, Overview, Guide)
Support Documentation
(Quality, FAQs, RoHS...)
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PLX Technology is a member of the USB Integrator’s Forum (USB-IF), Advanced Switching Interconnect SIG (ASI-SIG), Fabless Semiconductor Association (FSA), Intel Developer Network (IDN), PCI Industrial Computer Manufacturer Group (PICMG) and the PCI Special Interest Group (PCI-SIG).