ExpressLane™ PCI Express Switches
ExpressLane™ PCI Express Gen 2 Switches offer the highest performance, Dual Cast, Read Pacing, lowest latency, lowest power consumption, integrated non-transparency, integrated Hot-Plug support, small flip-chip packaging and highly flexible configurations up to x16.
What's New
News and Events
- Highly Flexible Port Configurations
- Lowest Power and Lowest Latency
- Non-Transparent Port Capability
- True Peer-to-Peer Data Transfer
- Hot-Plug Support
- Supports Access Control Services (ACS)
- Gen 2 performancePAK™
- Dual Cast™
- Read Pacing™
- Dynamic Buffer Allocation
- DMA-engine
- Gen 2 visionPAK™
- Performance Monitoring
- Packet Generator
- Measure SerDes Eye Width
- Error Injection
PLX ExpressLane™ Gen 2 PCI Express compliant Switches
| PCI-SIG® Base Spec. | Part Number | Lanes | Ports | Latency (ns) | Multi- Root/ Multi- Host | Dual/ Multi Cast | Read Pacing | ACS/ ARI* | NT* | DMA* | HPC* | VCs* | SSC Isolation* | Power Typ. (W) | Package Size (mm2) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| r2.0 | PEX 8696 | 96 | 24 | 176 | Yes | MC | Yes | Yes | Yes | -- | 4 | 1 | -- | 10.2 | 35 x 35 |
| r2.0 | PEX 8680 | 80 | 20 | 176 | Yes | MC | Yes | Yes | Yes | -- | 4 | 1 | -- | 9.0 | 35 x 35 |
| r2.0 | PEX 8664 | 64 | 16 | 176 | Yes | MC | Yes | Yes | Yes | -- | 4 | 1 | -- | 7.9 | 35 x 35 |
| r2.0 | PEX 8649 | 48 | 12 | 176 | Yes | MC | Yes | Yes | Yes | -- | 3 | 1 | -- | 6.7 | 27 x 27 |
| r2.0 | PEX 8648 | 48 | 12 | 140 | -- | DC | Yes | Yes | Yes | -- | 3 | 1 | -- | 3.7 | 27 x 27 |
| r2.0 | PEX 8647 | 48 | 3 | 140 | -- | DC | Yes | Yes | -- | -- | 0 | 1 | -- | 2.8 | 27 x 27 |
| r2.0 | PEX 8636 | 36 | 24 | 200 | Yes | MC | Yes | Yes | Yes | -- | 4 | 1 | -- | 8.8 | 35 x 35 |
| r2.0 | PEX 8632 | 32 | 12 | 145 | -- | DC | Yes | Yes | Yes | -- | 3 | 1 | -- | 2.6 | 27 x 27 |
| r2.0 | PEX 8625 | 24 | 24 | 200 | Yes | MC | Yes | Yes | Yes | -- | 4 | 1 | -- | 8.5 | 35 x 35 |
| r2.0 | PEX 8624 | 24 | 6 | 145 | -- | DC | Yes | Yes | Yes | -- | 3 | 1 | -- | 1.8 | 19 x 19 |
| r2.0 | PEX 8619 | 16 | 16 | 140 | -- | DC | Yes | Yes | Yes | Yes | ^^ | 2 | Yes | 2.0 | 19 x 19 |
| r2.0 | PEX 8618 | 16 | 16 | 140 | -- | DC | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.9 | 19 x 19 |
| r2.0 | PEX 8617 | 16 | 4 | 140 | -- | DC | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.9 | 19 x 19 |
| r2.0 | PEX 8616 | 16 | 4 | 150 | -- | DC | Yes | Yes | Yes | -- | 2 | 1 | -- | 1.6 | 19 x 19 |
| r2.0 | PEX 8615 | 12 | 12 | 140 | -- | DC | Yes | Yes | Yes | Yes | ^^ | 2 | Yes | 1.8 | 19 x 19 |
| r2.0 | PEX 8614 | 12 | 12 | 140 | -- | DC | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.7 | 19 x 19 |
| r2.0 | PEX 8613 | 12 | 3 | 140 | -- | DC | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.7 | 19 x 19 |
| r2.0 | PEX 8612 | 12 | 3 | 150 | -- | DC | Yes | Yes | Yes | -- | 2 | 1 | -- | 1.5 | 19 x 19 |
| r2.0 | PEX 8609 | 8 | 8 | 140 | -- | DC | Yes | Yes | Yes | Yes | ^^ | 2 | Yes | 1.6 | 15 x 15 |
| r2.0 | PEX 8608 | 8 | 8 | 140 | -- | DC | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.4 | 15 x 15 |
| r2.0 | PEX 8606 | 6 | 6 | 190 | -- | DC | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.3 | 15 x 15 |
| r2.0 | PEX 8604 | 4 | 4 | 190 | -- | DC | Yes | Yes | Yes | -- | ^^ | 2 | Yes | 1.3 | 15 x 15 |
* ACS = Access Control Service; ARI = Alternative Routing-ID Interpretation; DBA = Dynamic Buffer Allocation; NT = Non-Transparency;
DMA = Direct Memory Access; HPC = Hot-Plug Controllers; VCs = Virtual Channels; SSC = Spread Spectrum Clock Isolation;
^^ = Hot-Plug control via I2C; Gen 2 devices are fully backwards compatible
to r1.1/1.0a and recommended for all new designs
DC = Dual Cast™; MC = Multicast;
General Documentation
(Product Listing, Overview, Guide)
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PLX Technology is a member of the USB Integrator’s Forum (USB-IF), Fabless Semiconductor Association (FSA), Intel Developer Network (IDN), PCI Industrial Computer Manufacturer Group (PICMG) and the PCI Special Interest Group (PCI-SIG).